Why Data Movement Dominates Computing Energy

Landauer's limit prices irreversible erasure, but modern machines spend far more moving information through memory, packages, networks, and cooling. Bandwidth is the concrete energy problem.

Last updated September 2026

The argument

The useful computing floor is not one transistor operation. It is the energy and time needed to deliver data to an operation and return a verified result. As arithmetic density rises, locality, HBM, packaging, interconnect, precision, software reuse, and utilization determine how much silicon becomes useful work.

  • At temperature T, conventional irreversible bit erasure has a minimum dissipation of kT ln 2.
  • Present systems remain many orders above that floor because they switch physical devices reliably and move information through long hierarchies in finite time.
  • NIST describes high-bandwidth memory as a core AI supply-chain constraint and cites a generation processing up to 1.18 terabytes per second.
  • Peak interface bandwidth omits capacity, latency, access patterns, energy per bit, package yield, network traffic, cooling, and application utilization.

Measured results, derived quantities, projections, targets, and editorial inference are identified by context. Announced capacity is never treated as operating performance.

Part I: What changed

Arithmetic became abundant faster than proximity

HBM stacks memory beside compute on dense packages to create wide, short interfaces. Caches, tiling, operation fusion, quantization, sparsity, and near-memory designs attack the same problem from software and architecture: do not pay repeatedly to move the same information.

Three numbers that locate the frontier

kT ln 2Minimum heat for conventional irreversible bit erasure.
1.18 TB/sHBM throughput cited by NIST for a recent commercial generation.
$3.87bnExpected investment in an Indiana HBM packaging and R&D facility.

Landauer's principle is a thermodynamic limit, not measured chip energy. Vendor bandwidth is a peak component figure, not application throughput or energy efficiency.

Part II: The measurable curve

The roofline is an energy map as well as a speed limit

For a fixed arithmetic intensity, memory bandwidth caps achieved operations. Moving fewer bytes per result can raise performance and reduce energy simultaneously; adding compute units does neither once data delivery saturates.

Lower precision reduces storage, transfer, and arithmetic when task quality survives.

Specialization and larger batches improve utilization but can increase latency or become stranded when workloads change.

Part III: The physical stack

The headline metric sits on a system

Each layer can become the bottleneck even when the layer before it improves.

01

Physical state

Transistors, memory cells, wires, and emerging devices encode, retain, and switch information under noise.

Measure
J/switch · error rate
Failure mode
Leakage, reliability, and finite time
02

Package and memory

Registers, caches, HBM stacks, interposers, substrates, and host memory trade capacity against distance.

Measure
J/bit · GB/s · latency
Failure mode
Thermals and package yield
03

System interconnect

Links, switches, collective communication, and storage move state beyond one package.

Measure
Bytes/result · network utilization
Failure mode
Topology and synchronization
04

Algorithms and software

Precision, sparsity, locality, fusion, caching, routing, and scheduling decide which movement occurs.

Measure
Verified outcomes/joule
Failure mode
Generality and poor reuse
Part IV: The floor

Erasure has a floor; communication has a distance

Reversible operations can approach lower dissipation only under restrictive assumptions and time trade-offs. Real systems must maintain energy barriers against noise and charge physical wires; placing data closer and reusing it are therefore near-term gains far larger than approaching Landauer's limit.

energy per bit moved × bytes+switching and facility energy=energy per verified result
Part V: The bottleneck shift

Packaging becomes architecture

When memory sits beside logic, bonding, interposers, thermals, test, repair, HBM supply, and software locality shape performance as directly as processor design. The bottleneck migrates from arithmetic units into the whole package and fabric.

Reuse before moving

Tile, fuse, cache, and restructure algorithms around locality.

Represent with fewer bits

Use the lowest precision and compression consistent with verified quality.

Shorten the link

Use HBM, advanced packaging, chiplets, optics, or near-memory compute where justified.

Measure outcomes

Report whole-system joules and latency per accepted task, not isolated peak operations.

An optimistic view, with conditions

The efficient computer is a balanced information machine

The largest practical gains will come from co-designing algorithms, numerics, memory hierarchy, packaging, networks, power, and cooling so that useful information travels less often and less far.

Sources, method, and boundaries

The thermodynamic floor follows NIST's discussion of conventional and reversible computation. HBM figures come from NIST's project summary. The roofline relationship is a model, not a benchmark for a specific application.